This invention concerns a drive circuit for an image display device with unit picture elements arranged in a dot matrix display.
Presently, demand for a flat display device to replace the CRT (Cathode Ray Tube) of a dot matrix image display device has been increasing. Considerable efforts have been made to increase the number of image elements in order to improve resolution, and compact devices which have an image of similar quality to the present television receiver will most likely be put on the market in the near future. Therefore, interlaced scanning must be effected when displaying the present television video signal (such as NTSC composite video signal) on image display devices with an equivalent number of image elements as television. When interlaced scanning is effected, the vertical scanning circuit operating speed is changed in the conventional method, making it difficult to advance two lines on the screen during the horizontal retrace line. In other words, in an image display device that is shown in FIG. 1 with unit picture elements 1, 1 . . . to form a display portion and a horizontal scanning circuit (3) and vertical scanning circuit (4), with an odd field, the odd lines only counted from the top had to be scanned, and with an even field, the even lines only had to be scanned. Therefore, it was necessary to go from 2i-1.fwdarw.2i+1 with odd numbers and from 2i.fwdarw.2i+2 (i=1, 2, . . . ) with even numbers, skipping one line at a time with the vertical scanning circuit. This made it necessary to generate a drive pulse during one horizontal retrace line at twice the speed of when interlaced scanning was not effected in the drive circuit for the vertical scanning circuit which created speed limitations. Furthermore, the speed in the above drive circuit and scanning circuit must correspond to the above speed, which in turn created substantial limitations on circuit configuration, device construction and the materials used.